Why Attend
AI Hardware is evolving – and so are we! As machine learning models continue to grow in size and complexity, and more and more models enter production in enterprises worldwide, the way we approach accelerating these workloads is changing.
At the front end, data-centricity is taking precedence over model-centricity. At the back end, AI practitioners want systems that are performant and efficient, but also sustainable, explainable and accountable.
From massive research models like GPT-3, to day-to-day models deployed by enterprises around the world, we are lifting the hood on how to make AI fast, efficient and affordable.
AI Hardware Summit is evolving, we continue our mission to help those who are accelerating AI workloads in the cloud and at the edge, and this year is all about systems level AI acceleration.
2021 Speakers
Aart de Geus
Since co-founding Synopsys in 1986, Aart has expanded Synopsys from a start-up synthesis company to a global high-tech leader. He has long been considered one of the world's leading experts on logic synthesis and simulation, and frequently keynotes major conferences in electronics and design automation. Dr. de Geus has been widely recognized for his technical, business, and community achievements with multiple awards including Electronic Business Magazine's "CEO of the Year," the IEEE Robert N. Noyce Medal, the GSA Morris Chang Exemplary Leadership Award, the Silicon Valley Engineering Council Hall of Fame Award, and the SVLG Lifetime Achievement Award. He serves on the Boards of the Silicon Valley Leadership Group, Applied Materials, the Global Semiconductor Alliance, and the Electronic System Design Alliance.
Cheng Wang
Originally from Shanghai, PRC. Cheng has led the architecture, silicon implementation and software development for eFPGA over multiple generations from 180nm-16nm and now AI inferencing development at Flex Logix. Two years as VLSI designer at Zoran. BSEECS, UC Berkeley. MSEE, EE PhD UCLA: designed 5 FPGA chips from 90nm to 40nm. 2013 Distinguished PhD Dissertation Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper. Multiple patents at UCLA and Flex Logix.
Greg Diamos
Greg leads transformation engineering at Landing AI, focusing on building new AI engineering organizations. He is a founding member of MLPerf. Previously he lead AI research at Baidu’s Silicon Valley AI Lab (SVAIL), where he helped develop the Deep Speech and Deep Voice systems. Before Baidu, Greg contributed to the design of compiler and microarchitecture technologies used in the Volta GPU at NVIDIA, including the invention of the SIMT independent thread scheduling system. Greg holds a PhD from the Georgia Institute of Technology, where he led the development of the GPU-Ocelot dynamic compiler, which targeted CPUs and GPUs from the same program representation.
Lip-Bu Tan
Mr. Lip-Bu Tan is a Co-Founder, Partner, Managing Director, and Chairman of Walden International. Mr. Tan serves as the Chairman on the Board of SambaNova Systems, Inc., and has been the Chief Executive Officer at Cadence Design Systems Inc. since January 2009, serving as its President from January 2009 to November 2017. Lip-Bu focuses on semiconductor/components, cloud/big data, artificial intelligence and machine learning. Lip-Bu holds a B.S. in Physics from Nanyang University in Singapore, a M.S. in Nuclear Engineering from Massachusetts Institute of Technology, and a M.B.A. from the University of San Francisco.
Norman Jouppi
Norman P. Jouppi is a Distinguished Hardware Engineer at Google. He is known for his innovations in computer memory systems, including stream prefetch buffers, victim caching, multi-level exclusive caching, and development of the CACTI tool for modeling memory timing, area, and power. He has been the principal architect and lead designer of several microprocessors, contributed to the architecture and design of graphics accelerators, and extensively researched video, audio, and physical telepresence. His innovations in microprocessor design have been adopted in many high-performance microprocessors. His recent research has investigated the impact of emerging technologies such as non-volatile memory and nanophotonics on computer systems.
Jouppi received his Ph.D. in electrical engineering from Stanford University in 1984, and a master of science in electrical engineering from Northwestern University in 1980. While at Stanford, he was one of the principal architects and designers of the MIPS microprocessor, and developed techniques for MOS VLSI timing verification. He joined HP in 2002 through its merger with Compaq, where he was a Staff Fellow at Compaq’s Western Research Laboratory (formerly DECWRL) in Palo Alto, California. In 2010, he was named an HP Senior Fellow. From 1984 through 1996 he was a consulting assistant/associate professor in the electrical engineering department at Stanford University where he taught courses in computer architecture, VLSI, and circuit design.
He currently serves on the research highlights editorial board of Communications of the ACM. Norm holds more than 75 U.S. patents, with one Compaq Key Patent award. He has published over 125 technical papers, with several best paper awards and two International Symposium on Computer Architecture (ISCA) Influential Paper Awards. In 2013, he received the ACM SIGARCH Distinguished Service Award. He is a Fellow of the ACM and the IEEE, and a member of the National Academy of Engineering.
Euicheol Lim
Euicheol Lim is a Research Fellow and leader of system architecture team in memory system research, SK hynix. He received the B.S. degree and the M.S. degree from Yonsei University, Seoul, Korea, in 1993 and 1995, and the Ph.D. degree from Sungkyunkwan University, suwon, Korea in 2006. Dr. Lim joined SK Hynix in 2016 as a system architect in memory system research. Before joining SK Hynix, he had been working as an SoC architect in Samsung Electronics and leading the architecture of most Exynos mobile SoC series. His recent interesting point is memory and storage system architecture for AI and Big data system with various new media memory.
Gajinder Panesar
Gajinder ‘Gadge’ Panesar is a Fellow at Siemens. He was CTO at UltraSoC and joined Siemens via acquisition in 2020. One of Europe’s leading SoC architects, Gadge’s experience includes senior architecture definition and design roles within both blue-chip and start-up environments. He holds more than 20 patents and is the author of more than 20 published works. Prior to joining UltraSoC, he served at NVIDIA (NASDAQ:NVDA). As Chief Architect at Picochip he created the architecture of the company’s market-defining small-cell SoCs, and continued in this capacity after the company’s acquisition by Mindspeed Inc (NASDAQ:MSPD). His previous experience includes roles at STMicroelectronics, INMOS, and Acorn Computers. He is a former Research Fellow at the UK’s Southampton University, and a former Visiting Fellow at the University of Amsterdam.
Carole Jean Wu
Carole-Jean Wu is a Research Scientist at Facebook AI Research. Her research focuses on designing systems for at-scale execution of machine learning, such as personalized recommender systems and for mobile deployment. More generally, her research interests are in computer architecture with particular focus on energy- and memory-efficient systems. Carole-Jean chairs MLPerf Recommendation Benchmark Advisory Board and co-chairs MLPerf Inference. She received her M.A. and Ph.D. from Princeton and B.Sc. from Cornell. She holds tenure from ASU and is the recipient of the NSF CAREER Award, Facebook AI Infrastructure Mentorship Award, the IEEE Young Engineer of the Year Award, the Science Foundation Arizona Bisgrove Early Career Scholarship, and the Intel PhD Fellowship, among a number of Best Paper awards.
Rob Telson
Rob brings over 20 years of sales expertise in licensing intellectual property and selling EDA technology across multiple vertical markets. Rob has had success developing sales and support organizations at small, midsize, and large companies, as well as in start-up organizations. Most notably, his efforts have contributed to bringing several companies to fruition. At ARM, a global semiconductor and software design company, Mr. Telson was Vice President of Foundry Sales worldwide and prior was Vice President of Sales for the Americas. Most recently at Synopsys, he was responsible for building and developing a business focused on disruptive technologies in the semiconductor space.
Tim Kogel
Tim Kogel is a Principal Engineer for Virtual Prototyping in the Synopsys Verification Group. He received his diploma and PhD degree in electrical engineering with honors from Aachen University of Technology (RWTH), Aachen, Germany, in 1999 and 2005. He has authored a book and numerous technical and scientific publications on system-level modeling of SoC platforms. Tim is leading a team of applications engineering specialists, responsible for the definition, realization and deployment of Synopsys’ Virtual Prototyping solutions.
Rehan Hameed
Rehan Hameed received his PhD from Stanford University where he worked on energy efficient processor design and polymorphic multiprocessor architectures, and co-invented the Deep Vision architecture. In 2014 he co-founded Deep Vision and is now the CTO where he focuses on driving the company’s technological vision, including continuous evolution of the SW stack and silicon architecture. Previously he has worked on the design of multiple chips and algorithms for audio and vision processing.
Andrew Feldman
Andrew is a co-founder and CEO of Cerebras Systems, a venture-backed stealth-mode startup located in Los Altos, California. He leads a team of phenomenal people with a track record of building products that profoundly changed the largest markets in tech.
Prior to co-founding Cerebras Systems, he was co-founder and CEO of SeaMicro. SeaMicro (acquired by AMD for $355 million) was the pioneer in low power server technology. SeaMicro changed the trajectory of the server industry by inventing the high density, lower power, microserver category.
Prior to co-founding SeaMicro, he was Vice President of Marketing and Product Management at Force10 (acquired by Dell for $800 Million) Networks, and Vice President of Corporate Marketing and Corporate Development for Riverstone Networks (NASDAQ: RSTN) from inception through IPO.
Andrew holds a B.A. and MBA from Stanford University.
Karl Freund
Karl Freund is Moor Insights & Strategy’s consulting lead for HPC and Deep Learning. His recent experiences as the VP of Marketing at AMD and Calxeda, as well as his previous positions at Cray and IBM, positions him as a leading industry expert in these rapidly evolving industries. Karl works with investment and technology customers to help them understand the emerging Deep Learning opportunity in data centers, from competitive landscape to ecosystem to strategy.
Karl has worked directly with datacenter end users, OEMs, ODMs and the industry ecosystem, enabling him to help his clients define the appropriate business, product, and go-to-market strategies. He is also recognized expert on the subject of low-power servers and the emergence of ARM in the datacenter and has been a featured speaker at scores of investment and industry conferences on this topic.
Accomplishments during his career include:
- Led the revived HPC initiative at AMD, targeting APUs at deep learning and other HPC workloads
- Created an industry-wide thought leadership position for Calxeda in the ARM Server market
- Helped forge the early relationship between HP and Calxeda leading to the surprise announcement of HP Moonshot with Calxeda in 2011
- Built the IBM Power Server brand from 14% market share to over 50% share
- Integrated the Tivoli brand into the IBM company’s branding and marketing organization
- Co-Led the integration of HP and Apollo Marketing after the Boston-based desktop company’s acquisition
Karl’s background includes RISC and Mainframe servers, as well as HPC (Supercomputing). He has extensive experience as a global marketing executive at IBM where he was VP Marketing (2000-2010), Cray where he was VP Marketing (1995-1998), and HP where he was a Division Marketing Manager (1979-1995).
Uzi Baruch
Uzi brings nearly twenty years of experience in managing R&D teams and high scale projects at leading, global hi-tech companies. Prior to joining proteanTecs, he held executive roles at Optimal+, first as VP of R&D, where he had been instrumental in driving the company’s big data offering, enabling customers to innovate manufacturing through a data-centric approach. Beginning of 2019, Uzi assumed the lead of Optimal’s new growth business, and led the sales and delivery groups of Optimal+ Automotive and Electronics business unit until the acquisition of the company by National Instruments. Before joining Optimal+, Uzi served as VP of R&D in the Enterprise Group at NICE.
Mrinal Iyer
Mrinal Iyer is Director of Engineering at Graphcore leading a team focused on developing highly performant and scalable Deep Learning benchmarks for MLPerf™. During his career, beginning at Intel and now at Graphcore, he has worked in many stacks of the semiconductor space, from cutting edge lithographic processes, system software, compilers, kernels to frameworks and applications. Mrinal holds a PhD from the University of Michigan – Ann Arbor, where he worked on large scale quantum-mechanics problems.
David Patterson
David Patterson is a UC Berkeley professor of the graduate school, a Google distinguished engineer, and the RISC-V Foundation Vice-Chair. He received his BA, MS, and PhD degrees from UCLA. His Reduced Instruction Set Computer (RISC), Redundant Array of Inexpensive Disks (RAID), and Network of Workstation projects helped lead to multibillion-dollar industries. This work led to about 40 awards for research, teaching, and service plus many papers and seven books. The best known book is Computer Architecture: A Quantitative Approach and the newest is The RISC-V Reader. He and his co-author John Hennessy shared the 2017 ACM A.M Turing Award.
Mikhail Smelyanskiy
Misha Smelyanskiy is a Director of AI System Co-Design Group at Facebook. The group delivers innovative, high-performance optimizations of key AI services on existing platforms, as well as co-designs future AI systems at datacenter scale. Before joining Facebook in early 2017, Misha spent 13 years at Intel. First at Intel Parallel Computing Labs, leading application-driven parallel architecture research, which resulted in significant contribution to the definition of Intel first Many-Integrated Core architecture. And later as the director of Exascale SW/HW co-design group, working with external HPC and Machine Learning customers to derive system-level hardware. Misha has published 50+ papers in top-tier architecture, supercomputing and ML conferences and journals. Misha won Green500 competition in 2012, developed world fastest distributed quantum system simulator in 2016, and was 2014 Gordon Bell Award Finalist.
Jawad Khan
Dr. Jawad Khan is a Principal Engineer at Intel® Corporation. He has over 16 years of experience with high performance storage and memory system design and delivering ground-breaking products and proof of concept prototypes using FPGAs. More recently Jawad’s focus has shifted towards optimizing system level architecture for AI/ML applications, with particular emphasis towards memory and storage bottlenecks. He is a prolific inventor with 74 patents granted and/or pending. Jawad received his Ph.D. from the University of Cincinnati, in Computer Science and Engineering.
Rashmi Gopinath
Mark Maybury
MARK MAYBURY is Stanley Black & Decker’s first Chief Technology Officer. In this position, Mark manages a team across the company's businesses and functions and advises on technological threats and opportunities, as well as provides access to all elements of the global technology ecosystem.
Prior to joining Stanley Black & Decker, Mark spent 27 years at The MITRE Corporation, where he held a variety of strategic technology roles. Most recently he served as Vice President of Intelligence Portfolios and prior to that was MITRE's Vice President and Chief Security Officer and Director of the National Cybersecurity Federally Funded Research and Development Center (FFRDC). Before joining MITRE, Mark served as a U.S. Air Force officer. He later returned to the Air Force as Chief Scientist from 2010 to 2013 where he advised the Chief of Staff and Secretary of the Air Force on a wide range of scientific and technical issues.
He is currently a board member on the Defense Science Board, Mark Twain House and Museum Board and the Connecticut Science Center Board and previously served on multiple years of service on the Air Force Scientific Advisory Board and the Homeland Security Science and Technology Advisory committee. He is a fellow in both the IEEE and the Association for the Advancement of Artificial Intelligence.
Mark earned a bachelor's degree in mathematics from College of the Holy Cross (Fenwick Scholar, valedictorian), a master's degree in computer speech and language processing from Cambridge University, England (Rotary Scholar), a Master of Business Administration from Rensselaer Polytechnic Institute, and a doctoral degree in artificial intelligence also from Cambridge University.
Selcuk Kopru
Selcuk Kopru is Head of ML & NLP at eBay and is an experienced AI leader with proven expertise in creating and deploying cutting edge NLP and AI technologies and systems. He is experienced in developing scalable Machine Learning solutions to solve big data problems that involve text and multimodal data. He is also skilled in Python, Java, C++, Machine Translation and Pattern Recognition. Selcuk is also a strong research professional with a Doctor of Philosophy (PhD) in NLP in Computer Science from Middle East Technical University.
Stelios Diamantidis
Mike Henry
Dhiraj Mallick
Paolo Faraboschi
Paolo Faraboschi leads research in the Systems Research Lab at HP Labs. His technical interests lie at the intersection of hardware and software and include low power servers and systems-on-a-chip, workload-optimized, highly-parallel and distributed systems, ILP and VLIW processor architectures, compilers, and embedded systems. Faraboschi’s current research focuses on next-generation data-centric systems. His work on system-level integration for low energy servers and scale-out architectures is a key element of the HP Moonshot System, HP’s new class of software-defined servers built to address the energy efficiency challenges of hyperscale datacenters.
Previously, Faraboschi led HP Labs research in system-level modeling and simulation, an effort that resulted in the COTSon open-source simulation platform. He is also the founder of HP’s Barcelona Research Office, which pioneered research in contentprocessing systems.. Before that, Faraboschi was technical lead for the Custom-Fit Processors Project at HP Labs, Cambridge (MA), building highly-optimized, softwaredefined CPU cores. In that role, he was the principal architect of the instruction set architecture for the Lx/ST200 family of VLIW embedded processor cores (developed with STMicroelectronics) which have been used for over a decade in a variety of audio, video, and imaging consumer products, including HP's printers and scanners.
A regular keynote speaker at conferences and industry events, Faraboschi is an IEEE Fellow for "contributions to embedded processor architecture & system-on-chip technology." An active member of the computer architecture community, he also serves regularly on IEEE program and organizational committees, was guest editor of the 2012 edition of IEEE Micro TopPicks, and is co-author (with Josh Fisher and Cliff Young) of the book, “Embedded Computing: a VLIW Approach to Architecture, Compilers and Tools.” A co-holder of 24 granted patents, several other patent applications, and co-author of over 65 scientific publications, Faraboschi received his M.S. and Ph.D. (Dottora)
Kunle Olukotun
Kunle Olukotun is Cadence Design Professor of Electrical Engineering and Computer Science at Stanford University. He founded Afara Websystems, acquired by Sun in 2002. He is a Pioneer of Chip Multiprocessor Designs, Director of the Stanford Pervasive Parallelism Lab, and Co-leader of the Data Analytics for What’s Next (DAWN) research program.
In 2017 Olukotun and Chris Ré founded SambaNova Systems. SambaNova Systems has developed a disruptive next-generation computing platform to power machine learning and data analytics.
Dheevatsa Mudigere
Reiner Pope
Ingolf Held
Mr. Ingolf Held has been Chief Executive Officer of GrAI Matter Labs (GML) since January 2018. Prior to GML, he was responsible for technology strategy and product marketing of imaging and computer vision at Intel. He holds an MScEE from Erlangen University and an MBA from Rotterdam School of Management.
Yvonne Lutsch
Brett Simpson
Brett Simpson is a co-founder of Arete (formed in 2000) and is based in the firm's London office. He focuses on the global semiconductor component sector. Brett is a regular public speaker at industry events and after 17 years looking at the sector, has a wealth of experience to draw on. Prior to Arete, Brett spent two years at Goldman Sachs in an equity analyst role, specialising in European technology following three years with Ericsson UK, working in business development, covering all aspects of wireline and wireless telecom infrastructure.
Paul Lewis
Paul is CTO at Pythian. Prior to Pythian he was Global CTO at Hitachi Vantara responsible for the leading technology evangelism, client executive advocacy, and external delivery of the Hitachi vision and strategy especially related to Digital Transformation and Social Innovation. For the past 25+ years, Paul has focused on technology R&D and innovation, IT/business strategic plans and governance, security and risk management, software and infrastructure architecture as the CTO and Senior Executive Technologist of several financial services organizations from start-ups to large business services providers.
Vanessa Eriksson
Vanessa is currently SVP, Chief Digital Officer at Zenseact with the mission of bringing the company even further into the digital age. Managing petabytes of data as an asset while simultaneously leading the IT backbone, in pursuing Autonomous Driving. She is also a Member of the Board at Fidesmo and has been the Chairwoman of PwC’s CDO Advisory Board in 2017/18 and on Gartner’s EMEA and The America’s Data & CDO Advisory Boards between 2012 & 2017. A professional and experienced public speaker, Vanessa holds a proven track record in influencing key decision makers. Result oriented, her leadership skills include motivating teams, relationship building and integrity. A mother of 3 girls, Vanessa very feels strongly about encouraging Girls in Tech and has effectively launched a GiT event in 2017 with 4 large companies to promote her cause. Women in Leadership and Gender Diversity are topics that are close to her.
Steven Woo
Steven Woo is a Fellow and Distinguished Inventor at Rambus Inc., working on technology and business development efforts across the company. He is currently leading research within Rambus Labs on advanced memory systems for accelerators and computing infrastructure, and also manages an architecture team. Since joining Rambus, Steve has worked in various roles leading architecture, technology, and performance analysis efforts, and in marketing and product planning roles leading strategy and customer programs. Steve received his PhD and MS degrees in Electrical Engineering from Stanford University, and Master of Engineering and BS Engineering degrees from Harvey Mudd College.
Jianpeng Xu
Krishna Sankar
Bob Beachler
Bob Beachler is VP of Product at Untether AI. Bob is a Silicon Valley veteran and proven senior executive with industry leaders such as Altera, Xilinx, and BrainChip, he brings to the company a wealth of experience in the development and marketing of FPGAs, software tools, vision processors and artificial intelligence acceleration devices.
Dr. Charles Fan
Charles Fan is CEO and co-founder of MemVerge. Prior to MemVerge, Charles was the CTO of Cheetah Mobile leading its global technology teams, and an SVP/GM at VMware, founding the storage business unit that developed the Virtual SAN product. Charles also worked at EMC and was the founder of the EMC China R&D Center. Charles joined EMC via the acquisition of Rainfinity, where he was a co-founder and CTO. Charles received his Ph.D. and M.S. in Electrical Engineering from the California Institute of Technology, and his B.E. in Electrical Engineering from the Cooper Union.
Arvind Sujeeth
Arvind Sujeeth is Sr. Director of Software at SambaNova Systems. Arvind leads the compiler organization and is responsible for shaping the company’s software vision. Before joining SambaNova Systems, Arvind was the co-founder and chief technology officer of fintech startup mines.io, using machine learning to increase financial access in emerging markets. He was previously a research assistant at Stanford University, where he developed compilers for parallel and heterogeneous computing platforms. Arvind holds a PhD and MS in electrical engineering from Stanford University and a BS in computer engineering from the University of Texas at Austin.
Andrei Lopatenko
As Vice President of Engineering at Zillow Group, Andrei leads the teams responsible for the company’s search and discovery engines, including search science, development, infrastructure, and operations. As part of this role, he heads Zillow Group’s conversational AI efforts, which consist of initiatives around natural language processing platforms, speech analytics, call center AI, and conversational interfaces, with the goal of improving Zillow’s business and customer services using natural language processing and speech understanding.
Before joining Zillow in 2019, Andrei led search science teams within eBay and Walmart. Prior to Walmart he worked at Google and Apple, serving as a core contributor to products like Google web search, Apple Maps, Apple’s AppStore, and iTunes search engines. He previously led engineering efforts for Recruit Holdings’ AI Lab. He sat on the advisory board of Ozlo, a Conversational AI startup acquired by Facebook in 2017.
Andrei earned a Doctor of Philosophy in Computer Science from The University of Manchester, United Kingdom and Master of Science Degree from the Moscow Institute of Physics and Technology.
Jeff Boudier
Jeff Boudier is a product director at Hugging Face, creator of Transformers, the leading open-source NLP library. Previously Jeff was a co-founder of Stupeflix, acquired by GoPro, where he served as director of Product Management, Product Marketing, Business Development and Corporate Development.
Sanjive Agarwala
Steve Scargall
Steve Scargall is a Persistent Memory Technical Sales Specialist at Intel® Corporation. He wrote the highly popular “Programming Persistent Memory: A Comprehensive Guide for Developers” book and is responsible for supporting the enabling and development effort to integrate persistent memory technology into software stacks, applications, and hardware architectures. This includes Independent Software Vendors (ISV’s) with both proprietary or open source development, Original Equipment Manufacturers (OEMs), and Cloud Service Providers (CSPs). Steve received a B.Sc in Computer Science and Cybernetics from the University of Reading, UK where he studied Neural Networks, AI, and Robotics. He has over 19 years’ experience providing support and development of the Solaris Kernel, ZFS and UFS file systems, and Performance Analysis on x86 and SPARC using DTrace debugging in enterprise and cloud environments during his tenure at Sun Microsystems and Oracle. Steve now focuses on Optane persistent memory and SSD technology solutions.
Daniel Wu
Shreyansh Daftry
Shreyansh Daftry is a researcher, technologist and consultant in the fields of Artificial Intelligence (AI) and Space Technology. He is interested in pushing the boundaries of technology with innovation in the fields of Computer Vision, Machine Learning and Autonomous Robotics - Drones, Self-Driving (or Flying) Cars, etc. His lifelong ambition is to promote both the exploration of space and improvement of sustainable living on Earth.
Shreyansh received his M.S. degree in AI and Robotics from School of Computer Science, Carnegie Mellon University USA in 2016, and his B.S. degree in Electronics and Communication Engineering in 2013. Currently, he is a Research Scientist at NASA Jet Propulsion Laboratory (JPL) in California, working on AI technologies for robotic exploration of Earth, Mars and beyond!
Bryan Catanzaro
Bryan Catanzaro is vice president of Applied Deep Learning Research at NVIDIA, where he leads a team finding new ways to use AI to improve projects ranging from language understanding to computer graphics and chip design. Bryan's research at NVIDIA led to the creation of CUDNN, and more recently, he helped lead the team that invented DLSS 2.0. Prior to NVIDIA, he worked at Baidu to create next-generation systems for training and deploying end-to-end, deep learning-based speech recognition. Bryan received his PhD in Electrical Engineering and Computer Sciences from the University of California, Berkeley.
Dr. Thomas Andersen
Dr. Andersen heads the artificial intelligence and machine learning design group at Synopsys, where he focuses on developing new technologies in the AI and ML space to automate the future of chip design. He has more than 20 years of experience in the semiconductor and EDA industry. Dr. Andersen started his career at IBM’s TJ Watson Research Center in Yorktown Heights, New York, followed by managing synthesis/place-and-route engineering at Magma Design Automation and Synopsys. He holds a Master’s degree from the University of Stuttgart and a Ph.D. in Computer Engineering from the University of Kaiserslautern in Germany.
Christopher Aberger
Christopher Aberger is a senior director of software engineering at SambaNova Systems where he directs the machine learning team. Christopher works on efficient training algorithms for new and emerging hardware architectures. He received his Ph.D. degree in Computer Science from Stanford University where he studied the intersection of graph, database, and machine learning systems; this work received a Best Of award at VLDB in 2016 and an invited TODS article in 2017.
David Kanter
Eitan Medina
Prior to Habana, Eitan Medina was the VP and GM of the Fingerprint Business Unit at TDK-InvenSense. Prior to the TDK acquisition he was VP of Marketing at InvenSense and VP of Engineering at Audience Inc. (acquired by Knowles).
Mike Vildibill
Saurabh Kulkarni
Saurabh Kulkarni is currently the Head of Engineering in North America at Graphcore. In his career spanning 20 years, he has held leadership positions at Intel, Microsoft and Oracle prior to his current role at Graphcore. His roles have spanned Computer Architecture, Server Platform Architecture, Cloud infrastructure design, Virtual Machine sizing for Microsoft Azure, HPC infrastructure in the cloud and more recently hardware accelerators and scale-out infrastructure for AI compute in the cloud.
After graduating from the University of Minnesota, Saurabh started his career at Intel Corporation, where he initially worked on several generations of X86 CPUs for client and server market segments. Towards the later part of his time at Intel, he was a platform architect in the data center group driving customer focused innovation in the enterprise platform and firmware security areas.
In 2014, Saurabh joined Microsoft in the Azure Compute team focusing on the IaaS platform and infrastructure, with particular emphasis on scale-out architecture. He drove the server platform architecture and Virtual Machine (VM) sizing strategy for various Azure VM families across general purpose and accelerated computing use cases including HPC/AI workloads. In this capacity, one of his primary areas of focus was efficient architectures for disaggregated resource management for general purpose and accelerated compute.
Saurabh briefly worked at Oracle in the Oracle Cloud Infrastructure team working on cloud native services before joining Graphcore, where he currently is the Head of Engineering for North America. In his current role, he works closely with customers to understand their AI workload needs for training and inference with the objective to devise efficient, end-to-end solutions that can be either deployed on-prem, on public clouds or in a hybrid cloud setting. He is also involved in the architectural definition of the next generation of Graphcore IPUs and systems being designed to fulfil the demanding needs of future AI workloads at scale.
Ziad Asghar
Ziad leads Snapdragon roadmap planning, covering all smartphone platform products. He is also responsible for driving artificial intelligence and XR strategies throughout the company.
He has more than 20 years of experience in the wireless semiconductor industry where he has held a broad set of leadership positions from R&D to product management. Prior to joining Qualcomm, Ziad was at Texas Instruments where he worked on systems design of UMTS and LTE. Ziad played a pivotal role in the design of the first UMTS chipset at Texas instruments.
Andrew Grant
Andrew Grant joined Imagination in 2018 as Senior Director of Business Development, responsible for strategic business development in AI and building the wider ecosystem of AI partnerships. Mr. Grant advises customers on the impact of new and emerging technologies and how best to utilise neural networks in edge devices.
Prior to working with Imagination Technologies, Mr. Grant was involved with spin-outs from UCL and CERN, chairing Satalia, an AI company based in London, for several years. He has also worked with UCL School of Management, WPP and has completed innovation projects on the Future of Automotive, Aviation, Retail and the IoT. At British Telecom he was a CIO and Marketing leader and he has also worked with Intel and HP.
Mr Grant has a particular interest in autonomous vehicles and ADAS and how AI can be used to create smarter IoT devices for vision, home and robotics use cases and is a frequent visitor to China and the ASEAN region
Gayathri Radhakrishnan
Gayathri Radhakrishnan is currently part of the investment team at Micron Ventures, investing from $100M AI fund. She invests in startups that are leveraging AI/ML to solve critical problems in the areas of Manufacturing, Healthcare, Automotive and AgTech. Prior to that, she brings 20 years of multi-disciplinary experience across product management, product marketing, corporate strategy, M&A and venture investments in large Fortune 500 companies such as Dell and Corning and in startups. She has also worked as an early stage investor at Earlybird Venture Capital, a premier European venture capital fund based in Germany. She has a Masters in EE from The Ohio State University and MBA from INSEAD in France. She is also a Kauffman Fellow.
Cliff Young
Dan McCreary
Dan is a distinguished engineer in AI working on innovative database architectures including document and graph databases. He has a strong background in semantics, ontologies, NLP and search. He is a hands-on architect and like to build his own pilot applications using new technologies. Dan started the NoSQL Now! Conference (now called the Database Now! Conferences). He also co-authored the book Making Sense of NoSQL, one of the highest rated books on Amazon on the topic of NoSQL. Dan worked at Bell Labs as a VLSI circuit designer where he worked with Brian Kernighan (of K&R C). Dan also worked with Steve Jobs at NeXT Computer.
Cyril Vancura
Cyril Vancura is Partner at imec.xpand, an independently managed value-add venture capital fund that focuses on hardware-based nanotechnology innovations where imec technology, expertise, network and infrastructure will play a differentiating role. Based in Leuven, Belgium, Cyril is focusing predominantly on deeptech investment opportunities in Europe and the US. Before joining imec.xpand, Cyril was Investment Principal at Robert Bosch Venture Capital GmbH (RBVC), the corporate venture arm of Robert Bosch GmbH. At RBVC he was based in Germany, as well as, in the affiliate office in Silicon Valley. Cyril holds a Ph.D. and a diploma (Master Degree) in physics from the Swiss Federal Institute of Technology (ETH) in Zurich, Switzerland.
Gordon Hirsch Wilson
Pulin Desai
Adam Abed
Dennis Abts
Dennis is an expert in scalable vector architectures for high-performance computing. Previously at Google, he worked on topologies for energy-proportional networking, and Cray, where he was a Sr. Principal Architect on several Top500 massively-parallel supercomputers. Dennis has published over 20 technical papers in areas of memory systems, interconnection networks, and fault-tolerant systems. He holds over two dozen patents spanning 20+ years of experience at Cray and Google. Dennis holds a PhD in Computer Architecture from the University of Minnesota and is a Senior Member of IEEE and ACM Computer Society.
Brandon Wang
Brandon Wang is a Vice President at Synopsys, overseeing corporate level growth strategies, including M&A, business and research partnerships, and new ventures. Prior to that, he served various senior management roles across strategy, marketing, solution engineering and R&D at Cadence and Arm. An Electrical and Computer Engineer by training, Brandon holds 10 patents, and has published at 20+ IEEE conferences, in journal papers and invited talks; He also has an MBA degree from the Wharton School at the University of Pennsylvania.
John Min
John Min is the Director of Field Applications Engineering for North America at Andes. John has been working for processor companies in the Silicon Valley for past 30 years with companies including at Hewlett Packard, LG, ARC, MIPS and SiFive. He brings wealth of information on Architecture of processors, IP and high performance processing. John specializes in balancing the Power, Area and Performance to yield optimized SoC. John is a graduate of University of Southern California with degrees in Electrical Engineering and Biomedical Engineering.
Thang Tran
Dr. Thang Tran, Principal Architect of Andes Technology Corp. and veteran of many high-performance computing (HPC) designs. Dr. Tran has engineered innovative CPUs at Intel, AMD, Freescale, TI, Analog Devices among others. His doctoral thesis at the University of Texas at Austin from the Electrical and Computer Engineering Department was on Superscalar Microprocessor Architecture with Multi-Bit Scoreboard Technique.
Matthew Burns
Matthew Burns develops go-to-market strategies for Samtec’s Silicon to Silicon solutions. Over the course of 20+ years, he has been a leader in design, technical sales and marketing in the telecommunications, medical and electronic components industries. Mr. Burns holds a B.S. in Electrical Engineering from Penn State University.
Jian Zhang
Romano Hoofman
Romano Hoofman is Program Director at imec.IC-link since 2016. He is currently responsible for the innovation programs of the unit and for the coordination of the EUROPRACTICE Service.
He started his career in industry, where he worked as a Principal Scientist at Philips Research and later on NXP Semiconductors. He covered many different R&D topics, ranging from CMOS integration, advanced packaging, thin film batteries, photovoltaics and (bio)sensors.
Romano received his PhD from the Technical University of Delft in 2000, where he investigated charge transport in semi-conducting polymers. He has authored more than 30 publications and holds more than 10 patents in various research areas.
Sree Ganesan
Sree Ganesan leads Software Product Management at Habana Labs, working alongside a diverse global team to deliver state-of-the-art deep learning capabilities of the Habana SynapseAI® software suite to the market. Previously, she was Engineering Director in Intel’s AI Products Group, where she was responsible for AI software strategy and deep learning framework integration for Nervana NNP AI accelerators. Ms. Ganesan joined Intel in 2001 and has held a variety of technical and management roles in software engineering, VLSI CAD and SOC design methodology. Ms. Ganesan received a bachelor’s degree in electrical engineering from the Indian Institute of Technology Madras, India and a PhD in computer engineering from the University of Cincinnati, Ohio.
Moshe Tanach
Naveen Rao
Naveen Rao is corporate vice president and general manager of the Artificial Intelligence Products Group at Intel Corporation.
Trained as both a computer architect and neuroscientist, Dr. Rao joined Intel in 2016 with the acquisition of Nervana Systems. As chief executive officer and co-founder of Nervana, he led the company to become a recognized leader in the deep learning field. Before founding Nervana in 2014, Rao was a neuromorphic machines researcher at Qualcomm Inc., where he focused on neural computation and learning in artificial systems. Rao’s earlier career included engineering roles at Kealia Inc., CALY Networks and Sun Microsystems Inc.
Rao earned a bachelor’s degree in electrical engineering and computer science from Duke University, then spent a decade as a computer architect before going on to earn a Ph.D. in computational neuroscience from Brown University
Ty Garibay
Ty is currently the VP of Engineering at Mythic, where he is leading the development of the first neural network accelerator based on analog computation. Previously, he was CTO at Arteris IP and led IC design teams at Intel/Altera, TI and ARM. In days past, Ty participated in the development of microprocessors and SoCs at ARM, MIPS, Motorola, Cyrix and Alchemy. Ty has more than 30 US patents granted.
Anil Mankar
Anil Mankar has spent 30 years developing products in the semiconductor industry. At Western Digital, Mr. Mankar developed PC core Logic chipsets. During his years at Conexant Systems Inc. in the position of VP of Engineering, he developed multiple products across industry segments and later became the company's Chief Development Officer overseeing all product development for V92 Modem, DSL, Set-top boxes, PC audio and video 'System on a Chip' products. Mr. Mankar was SVP of VLSI Engineering at Mindspeed Technologies, responsible for Wireless and VOIP infrastructure product development.
Andres Rodriguez
Andres Rodriguez is a Sr. Principal Engineer and AI Architect in the Data Platform Group at Intel Corporation where he designs deep learning solutions for Intel's customers and provides technical leadership across Intel for deep learning hardware and software products. He has 15 years of experience working in AI. Andres received a Ph.D. from Carnegie Mellon University for his research in machine learning. He was the lead instructor in the Coursera course An Introduction to Practical Deep Learning to over 20 thousand students. He has been an invited speaker at several AI events, including AI with the Best, ICML, CVPR, AI Frontiers Conference, Re-Work Deep Learning Summit, TWIML, Startup MLConf, Open Compute Platform Global Summit, AWS re:Invent, Baidu World, Baidu Cloud ABC Inspire Summit, Google Cloud OnAir Webinar, and several Intel events, as well as an invited lecturer at Carnegie Mellon University, Stanford University, and UC Berkeley.
Kavitha Prasad
Kavitha Prasad is the Vice President of Business Development and Systems Applications at SiMa.ai. Through close collaboration with customers and partners, Kavitha is responsible for defining the system-level architecture for SiMa.ai's machine learning SoC. She is a technology leader with over 22 years of experience in delivering multiple successful products in ASICs, SoCs, FPGAs, and servers across multiple process nodes. Prior to SiMa.ai, Kavitha was responsible for system solutions across embedded market segments for the Intel Platform Solutions Group, among other positions at Intel. Prior to Intel she held multiple technology roles at Xilinx and Philips. Kavitha holds a Master of Science in Electrical and Electronics Engineering from San Jose State University.
Rangan Sukumar
Rangan Sukumar is a data science/artificial intelligence architect. He is a Distinguished Technologist in the Chief Technology Office at Hewlett Packard Enterprise. Prior to that, he was a scientist and a Group Leader responsible for knowledge discovery/data science workflows on the world’s fastest supercomputers at Oak Ridge National Laboratory. He has a PhD in artificial intelligence and over 70 publications in areas of disparate data collection, organization, processing, integration, fusion, analysis and inference - applied to a wide variety of domains such as drug discovery, autonomous cars/robotics, education, social network analysis, electric grid modernization and public policy.
Suhas Mitra
Suhas Mitra is Director AIML Product Management and Marketing in Cadence Design Systems. His interests are in Deep Learning Hardware-Software co-design, Embedded Systems and Edge Computing. He holds a MS in Electrical & Computer Engineering and Masters in Business Administration. Currently he drives the Deep Learning Neural Accelerator (DNA) product line in Cadence Design Systems.
Ron Lowman
Ron Lowman joined Synopsys in 2014 and is currently the AI Strategic Marketing Manager for the Solutions Group. Ron is responsible for driving Synopsys’ Artificial Intelligence market IP initiatives, including strategic business and market trend analysis.
Prior to joining Synopsys, Lowman spent 16 years at Motorola/Freescale in Controls Engineering, Automotive Product & Test Engineering, Product Management, Business Development, Operations, and Strategy Roles.
Ron holds a Bachelor of Science in Electrical Engineering from Colorado School of Mines and an MBA from the University of Texas in Austin.
Dave Barker
Peter Carson
Mr. Carson leads solutions marketing for Marvell, focused on the company's 5G, cloud data center, enterprise and automotive markets. Prior to Marvell, he served as vice president global marketing for Pixelworks and held senior technical marketing and business development roles at Qualcomm, as well as at Flarion Technologies, where he was a member of the founding executive team and led the formation of the IEEE 802.20 standards working group. Earlier, Mr. Carson held domestic and overseas leadership roles at ArrayComm, ADC Telecommunications and Verizon Wireless, where he co-founded debitel AG, one of Europe’s largest largest MVNOs.
Jeremy Roberson
BSEE, MSEE, and EE PhD from UC Davis specializing in Signal Processing Algorithms. Jeremy has worked on algorithms and hardware accelerator architectures for machine learning and signal processing in domains such as automatic speech recognition, object detection for biomedicine, capacitive sensing systems, and more. He has several patents and publications within these areas.
Arvind Krishnamurthy
Arvind Krishnamurthy is the Short-Dooley Professor in the Paul G. Allen School of Computer Science & Engineering. His research interests span all aspects of building effective and robust computer systems, in the context of both data centers and Internet-scale systems. More recently, his research has focused on programmable networks and systems for machine learning. He is an ACM fellow, a past program chair of ACM SIGCOMM and Usenix NSDI and serves on their technical steering committees, is the Vice President of Usenix, and serves on the ICSI and CRA boards.
Derek Chickles
Derek Chickles leads the machine learning software group at Marvell developing the toolchain, runtime drivers, and Marvell DPU-optimized models all co-designed with Marvell hardware. Outside of ML, his past work also includes development of Marvell’s LiquidIO™ SmartNIC platform. He earned his BS degree in Computer Science from University of Colorado at Boulder.
Christina Day
Christina Day as a Senior Product Marketing Manager at Samsung Semiconductor focuses her attention on the forces and behaviors that are driving NAND and Enterprise SSD demands. Christina works tightly with cross functional teams and partners to educate them on market trends, ensuring forward looking plans are strategically implemented for enterprise server and storage platforms. Her extensive experience and storage background help shape decisions internally and externally. Christina has tapped into the software industry but forces of nature always seem to pull her back to storage.
Frank Berry
Frank Berry is VP of Marketing at MemVerge. Before joining MemVerge, Frank was founder and senior analyst at IT Brand Pulse, a trusted source of testing, research and analysis covering data center infrastructure. Frank is also founder and publisher of awsdailynews.com. Prior to founding IT Brand Pulse, Frank was vice-president of corporate marketing for networking company QLogic, and vice president of marketing for storage company Quantum.
David Kucher
David is a Software Engineer on the machine learning (ML) team at SambaNova, where he researches, implements, and trains state-of-the-art computer vision models on a variety of vision-related tasks. David is interested in efficient training of ML models, and creating software systems for ML. David completed his Masters in Electrical and Computer Engineering, and Bachelors in Computer Engineering at the University of Michigan.
Lata Jindal
Lata Jindal is a senior principal engineer at Sambanova systems who firmly believes AI will change the way we work and live in next 10 years. She is a seasoned professional whose work has spanned chip designs, systems and software. Before Sambanova, she has been a director at Intel and Oracle. She holds a masters in electrical engineering from IIT Delhi.
Adam Wang
Adam is a Software Engineer at SambaNova and is passionate about integrating AI with other fields to provide better services. He worked at ASUS Intelligence Cloud Service Center and has experience in developing applications with AI. He holds a master's in electrical and computer engineering from the University of Illinois Urbana-Champaign.
Kent Orthner
Kent Orthner has worked in the IP, semiconductor, and embedded industry for over 20 years, with a focus on all aspects of interconnect, IP interoperability, and FPGA design. Prior to joining Achronix, Kent was the Vice President of Engineering at Arteris, where he developed and released the highly scalable and configurable Ncore cache-coherent SoC interconnect IP. Before that, Kent worked at Altera for 11 years, where he led the development of the Qsys System Integration platform and the SystemConsole debug infrastructure. At Achronix, Kent contributes to leading-edge FPGA architecture and SoC integration. Kent holds a B.A.Sc. from the University of Ottawa, and a M.Eng from Carleton University, in Computer and Electrical Engineering, respectively.
Tien Shiah
Tien Shiah is Senior Manager, Marketing for High Bandwidth Memory at Samsung Semiconductor Inc. In this capacity, he serves as the company’s product consultant, market expert, and evangelist for HBM in the Americas, focused on providing a clear understanding of the tremendous benefits offered by HBM in the enterprise and client marketplaces. He brings more than 16 years of product marketing experience from the semiconductor and storage industries, and has presented at a number of industry conferences, such as Flash Memory Summit, the Storage Developer Conference, and Dell EMC World. He holds an MBA from McGill University (Montreal, Canada), and an Electrical Engineering degree from the University of British Columbia.
Young Paik
Young Paik is a Senior Director in Product Planning at Samsung Semiconductor, Inc. He works with a variety of flash and DRAM technologies that are focused on Artificial Intelligence and Business Intelligence. Young’s current responsibilities are in new use cases that push the limits of the boundaries of modern hardware and software. He has a long history working for Silicon Valley startups, specializing in technologies related to: databases, numerical and legal analytics, data visualization, cloud, and data centers.
Young earned Bachelor’s degrees in both physics and math at the University of California at Irvine, and attended graduate school in astronomy at the University of California at Berkeley where he studied supernovae.
Sarah Peach
Sarah Peach manages new product introduction for Samsung’s US memory business.
Saurabh Kulkarni
Saurabh Kulkarni is currently the Head of Engineering in North America at Graphcore. In his career spanning 20 years, he has held leadership positions at Intel, Microsoft and Oracle prior to his current role at Graphcore. His roles have spanned Computer Architecture, Server Platform Architecture, Cloud infrastructure design, Virtual Machine sizing for Microsoft Azure, HPC infrastructure in the cloud and more recently hardware accelerators and scale-out infrastructure for AI compute in the cloud.
After graduating from the University of Minnesota, Saurabh started his career at Intel Corporation, where he initially worked on several generations of X86 CPUs for client and server market segments. Towards the later part of his time at Intel, he was a platform architect in the data center group driving customer focused innovation in the enterprise platform and firmware security areas.
In 2014, Saurabh joined Microsoft in the Azure Compute team focusing on the IaaS platform and infrastructure, with particular emphasis on scale-out architecture. He drove the server platform architecture and Virtual Machine (VM) sizing strategy for various Azure VM families across general purpose and accelerated computing use cases including HPC/AI workloads. In this capacity, one of his primary areas of focus was efficient architectures for disaggregated resource management for general purpose and accelerated compute.
Saurabh briefly worked at Oracle in the Oracle Cloud Infrastructure team working on cloud native services before joining Graphcore, where he currently is the Head of Engineering for North America. In his current role, he works closely with customers to understand their AI workload needs for training and inference with the objective to devise efficient, end-to-end solutions that can be either deployed on-prem, on public clouds or in a hybrid cloud setting. He is also involved in the architectural definition of the next generation of Graphcore IPUs and systems being designed to fulfil the demanding needs of future AI workloads at scale.
Joshua Saxe
Joshua Saxe is Chief Scientist at Sophos, where he manages the Sophos AI team, and provides strategic leadership for the company’s research and development efforts. Before joining Sophos, Joshua was Chief Data Scientist at Invincea, where he led the development of machine learning systems for analyzing, detecting and blocking malware executables and malicious behavior, and was Principal Investigator on multiple DARPA funded efforts focused on applying machine learning and data visualization to the federal government’s cybersecurity challenges. He is the author, with Hillary Sanders, of the book Malware Data Science, from No Starch Press, and an author on multiple patents and peer-reviewed security machine learning papers.
Frank Ferro
Meet Our Event Partners
Meet our 2021 event partners! Simply scroll, search or filter by your most appropriate choice. All partners will be available to connect with throughout the event and post-event through the virtual platform.
2021 Partners
Headline Partner
Synopsys
Website: www.synopsys.com
Smart, Secure Everything—From Silicon to Software
Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure.
Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing. Our technology helps customers innovate from Silicon to Software, so they can deliver Smart, Secure Everything.
Platinum Partners
Cadence
Website: www.cadence.com
Cadence’s goal is to empower engineers at semiconductor and systems companies to create innovative, intelligent, and highly differentiated electronic products that transform the way people live, work, and play. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to systems—in AI, IoT, mobile, 5G, consumer, cloud, data center, automotive, aerospace, and other market segments. Cadence offers specialized IP with industry-leading performance, power efficiency, and interconnects, as well as AI-specific verification and implementation solutions. The company also employs machine learning within its tools and solutions to enable the best power, performance, and area (PPA), quality of results (QoR), and time-to-market (TTM) benefits.
Graphcore
Website: https://www.graphcore.ai/
We’re optimistic for a future where people live healthier, more informed, more creative lives. We see a world where technology enhances human potential, and takes us into a new era of intelligence and progress that everyone can benefit from.
We let innovators create the next breakthroughs in machine intelligence.
We believe our Intelligence Processing Unit (IPU) technology will become the worldwide standard for machine intelligence compute. The Graphcore IPU is going to be transformative across all industries whether you are a medical researcher, roboticist or building autonomous cars.
We have created a completely new processor, the IPU, specifically designed for AI compute. The IPU’s unique architecture lets AI researchers undertake entirely new types of work, not possible using current technologies, to drive the next advances in machine intelligence.
Habana
Website: www.habana.ai
Habana is an AI solutions semiconductor company. Eitan is Habana’s Chief Business Officer and will share with us Habana’s vision of the AI/Deep-learning processing needs and Habana’s solutions.
Intel
Website: https://www.intel.com/content/www/us/en/artificial-intelligence/overview.html
Please visit our website for more information.SambaNova
Website: https://www.sambanovasystems.com/
We are a computing startup focused on building the industry’s most advanced systems platform to run AI applications from the datacenter to the edge.
Gold Partners
Brainchip
Website: https://brainchipinc.com/miss-the-bus/
BrainChip is a global technology company that has developed a revolutionary advanced neural networking processor that brings artificial intelligence to the edge in a way that existing technologies are not capable. The solution is high performance, small, ultra-low power and enables a wide array of edge capabilities that include continuous learning and inference. The company markets an innovative event-based neural network processor that is inspired by the spiking nature of the human brain and implements the network processor in an industry standard digital process. By mimicking brain processing BrainChip has pioneered an event domain neural network processor, called Akida™, which is both scalable and flexible to address the requirements in edge devices. At the edge, sensor inputs are analyzed at the point of acquisition rather than transmission to the cloud or a datacenter. The Akida neural processor is designed to provide a complete ultra-low power Edge AI network processor for vision, audio and smart transducer applications. The reduction in system latency provides faster response and a more power efficient system that can help reduce the large carbon footprint of datacenters.
Cerebras
Website: https://cerebras.net/
Cerebras is revolutionizing compute for Deep Learning
We are a team of pioneering computer architects, system engineers, software engineers, and ML researchers.
We have come together to build a new class of computer system, designed from first principles for the singular goal of accelerating AI and changing the future of AI work.
Flex Logix
Website: www.flex-logix.com
Flex Logix’ NMAX inferencing accelerators provide very high throughput and hardware utilization even at batch size = 1, with low system cost and system power.
NMAX MAC utilization is over 50% even at batch size = 1. For most inferencing engines utilization drops dramatically from batch 10 to batch 1 because they stall loading weights. High MAC utilization means less silicon area needed for the same throughput.
NMAX uses proprietary Flex Logix interconnect technology to utilize local, distributed SRAM very efficiently generating very high local bandwidth and dropping DRAM bandwidth requires to that of 1 or 2 LPDDR4 DRAMs, even for YOLOv3 at 30 frames/second. This lowers power and lowers cost.
NMAX will be available in TSMC16FFC/12FFC in mid 2019.
Imagination Technologies
Website: https://www.imaginationtech.com/
Imagination have over 25 years of experience in designing and licensing market-leading processor solutions for graphics and vision & AI processing that offer strong differentiation compared to competing solutions for our customers.
We are chosen as a partner by many leading innovators in electronics because we are passionate about innovation and have the drive to deliver technologies that solve key problems in new, more efficient ways.
We partner with leaders in automotive, drone and mobile smart vision applications.
Qualcomm
Website: www.qualcomm.com
We are engineers, scientists and business strategists. We are from many different countries and speak many different languages. We come from diverse cultures and have unique perspectives. Together, we focus on a single goal—invent mobile technology breakthroughs.
Rambus
Website: https://www.rambus.com/
DATA. FASTER. SAFER
Rambus is a premier silicon IP and chip provider that makes data faster and safer. We are dedicated to delivering first-to-market, high-quality memory, SerDes, and embedded security solutions for our customers. Throughout our 30-year history, Rambus has led the industry with innovations and IP solutions that solve the fundamental challenges faced by leading-edge computing systems.
SPEED AND SECURITY FOR THE AI/ML REVOLUTION
Artificial intelligence (AI) and machine learning (ML) are at the heart of the latest virtuous cycle of computing. Enormous gains in computing power have made practical the neural networks underpinning the revolutionary strides being made in AI/ML. At Rambus, we develop products that move and protect the data critical to the development and performance of AI/ML. We provide high-speed interfaces, security cores, and chips that optimize the computing and networking devices at the foundation of the AI/ML revolution.
Samsung
Website: www.samsung.com
Samsung Semiconductor, Inc.
Based in the heart of Silicon Valley, Samsung Semiconductor, Inc., is an industry-leading, multi-billion dollar subsidiary of Samsung Electronics Corporation that provides the world’s most advanced technology for consumer electronic devices and computing platforms. Samsung’s state-of-the-art memory, logic, solid state drives, LED components, OLED displays, and foundry services are integrated across AI, high-performance computing, data centers, IoT, automotive and emerging markets. Driven by excellence and innovation, Samsung leverages its proven expertise and leadership to develop technology products that will shape and enhance the consumer’s future.
Siemens
Website: https://www.siemens.com
Siemens Digital Industries Factory Automation is an innovation and technology leader in industrial automation and digitalization. In close cooperation with our partners and customers, we are the driving force for the digital transformation in the discrete and process industries and integrate cutting-edge technologies such as artificial intelligence, edge computing, industrial 5G, autonomous handling systems, blockchain and additive manufacturing into our Digital Enterprise portfolio. Taking advantage of our experts on cutting-edge technologies as well as our deep knowledge and understanding of the challenges within the industry, we provide our customers with solutions which bring tangible value.
Event Partners
Achronix
Website: https://www.achronix.com/
Achronix is a leading manufacturer of FPGA and eFPGA IP data acceleration solutions specifically tuned for high-performance AI and ML applications. FPGAs are paving the way for the next era in AI applications and the ubiquitous building blocks for AI deployments from the cloud, to the edge to IoT. Our revolutionary new 7nm Speedster®7t FPGAs and Speedcore™ eFPGA IP are optimized for high-bandwidth workloads and eliminate the performance bottlenecks associated with traditional FPGAs.
Delivering ASIC-like performance, Speedster7t FPGAs are highly configurable, highly flexible compute engines. Built with high-performance 112Gbps transceivers, high-bandwidth GDDR6 interfaces, and high-speed PCIe Gen5 ports, Speedster7t FPGAs provide the high speed data and memory interfaces necessary for AI/ML applications. The Speedster7t FPGAs also feature a new machine learning processor (MLP) which supports new AI/ML number formats such as block floating port and provides >80 TOPs performance.
Achronix’ Speedcore eFPGA IP brings the power and flexibility of programmable logic to ASICs and SoCs. Speedcore IP can be seamlessly integrated into a custom design and is the only eFPGA technology shipping in high-volume production today. With Speedcore IP, customers define both resource counts and mix for logic, embedded memory blocks, MLP, and DSP blocks at up to 90% cost savings vs. traditional standalone FPGA solutions.
Visit achronix.com to learn more about our FPGA technology optimized for AI/ML applications.
Andes Technology
Website: http://www.andestech.com/en/homepage/
Please visit our website for more information.Codeplay
Website: https://www.codeplay.com/
Codeplay Software is a world pioneer in enabling acceleration technologies used in AI, HPC and computer vision applications. Codeplay was established in 2002 in Edinburgh, Scotland and creating some of the first software tools enabling complex applications to be accelerated using graphics processors. Today, most AI, HPC and computer vision software are developed using graphics processors, and more recently specialized AI and computer vision accelerators, including RISC-V Vector processor. Codeplay continues to work with global technology leaders to make the latest complex AI systems programmable using open standards and allows application developers to quickly bring software to the market.
GrAI Matter Labs
Website: https://www.graimatterlabs.ai/
At GrAI Matter Labs, we developed a neuromorphic computing architecture for sensor analytics and machine learning, inspired by the biological brain. It enables real-time response for autonomous action. The unique combination of a Dataflow architecture and near memory compute exploits all forms of sparsity at the edge and can deliver autonomy at low power. It is fully programmable with standard frameworks and languages.
Marvell
Website: www.marvell.com
To deliver the data infrastructure technology that connects the world, we’re building solutions on the most powerful foundation: our partnerships with our customers. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.
Mythic
Website: www.mythic-ai.com
BRINGING NEXT-LEVEL AI TO EVERY DEVICE CONSTANT EVOLUTION
Mythic envisions a world where every device is intelligent, with human-like senses and high-level understanding of the environment around it. To realize this we built a team of top talent who bring decades of industry experience from across the entire computing spectrum – empowering everyone to challenge assumptions and eliminate the barriers to achieving our mission. They’ve gone beyond conventional digital architectures, memory, and calculation elements – rethinking everything from the ground up: from transistors and physics, through circuits and systems, up to software and AI algorithms. The result: Powerful life-enhancing AI that customers can push into anything – from fitness bands and hearing aids to self-driving cars and robotic drones.
proteanTecs
Website: https://www.proteantecs.com/
proteanTecs develops revolutionary Universal Chip Telemetry™ (UCT) for electronic systems throughout their entire lifecycle, increasing their performance and reliability. By applying machine learning to novel data created by on-chip UCT Agents™, proteanTecs provides meaningful insights and visibility unattainable until today, leading to new levels of quality, reliability and scale. Founded in 2017, the company is headquartered in Israel with offices in New Jersey, California and Taiwan.
Samtec
Website: http://www.samtec.com
Founded in 1976, Samtec is a privately held, $822 MM global manufacturer of a broad line of electronic interconnect solutions, including High-Speed Board-to-Board, High-Speed Cables, Mid-Board and Panel Optics, Precision RF, Flexible Stacking, and Micro/Rugged components and cables. With 40+ location severing approximately 125 countries, Samtec’s global presence enables its unmatched customer service.
Media Partners
IoT Global Network
Website: www.iotglobalnetwork.com
IoT Global Network
Discover the world of IoT.
IoT Global Network is the ultimate intelligence platform for the global machine-to-machine communication value chain.
IoT Global Network serves as an invaluable source of information for IoT decision makers in all areas of industry and public services, including consumer-related, energy, financial, industrial, healthcare, security and transportation, – and anyone else who would like to learn more about how the Internet of Things will shape tomorrow’s society.
Discover. Learn. Connect. Engage.
Edge IR
Website: http://www.edgeir.com
Edge Industry Review (EdgeIR.com) is a news, analysis and industry resource website documenting the changes taking place on the edge of the internet infrastructure market – the present and the future of the Edge Computing ecosystem.
Enterprise AI
Website: www.enterpriseai.news/
EnterpriseAI further sharpens and expands upon the already extensive coverage originating from its predecessor, EnterpriseTech, on machine/deep learning, advanced modeling/simulation, high performance data analytics and the technologies that enable them, including; high performance data centers, cloud computing, high performance storage, AI silicon and AI frameworks – spanning all relevant verticals. With its focus trained on decision-makers, technologists and thought leaders across the technology spectrum, EnterpriseAI delivers reporting, insight and analysis on AI technologies, tools and strategies that enable business deployment and integration in the enterprise.
HPCwire
Website: https://www.hpcwire.com/
HPCwire is the #1 news and information resource covering the fastest computers in the world and the people who run them. With a legacy dating back to 1987, HPC has enjoyed more than three decades of world-class editorial and topnotch journalism, making it the portal of choice selected by science, technology and business professionals interested in HPC, AI and data-intensive computing. For topics ranging from late-breaking news and emerging technologies in HPC, to new trends, expert analysis, and exclusive features, HPCwire delivers it all and remains the HPC community’s most reliable and trusted resource.
Emerj
Website: www.emerj.com
Emerj helps business leaders survive and thrive in AI disruption. Jargon free research, case studies and business insight. Connecting business leaders to the products and services they need to stay ahead of the competition.
Silicon Valley News
Website: https://www.siliconvalley.com/
Please visit our website for more information.Mergermarket
Website: www.mergermarket.com
M&A intelligence, data and research
In M&A, information is the most valuable currency. Mergermarket reports on deals 6-24 months before they become public knowledge, giving our subscribers a powerful competitive advantage. With the largest network of dedicated M&A journalists and analysts, Mergermarket offers the most comprehensive M&A intelligence service available today. Our reporters are based in 67 locations across the Americas, Europe, Asia-Pacific, the Middle East and Africa.”
Khronos Group
Website: https://www.khronos.org/
The Khronos Group is an open, non-profit, member-driven consortium of over 150 industry-leading companies creating advanced, royalty-free interoperability standards for 3D graphics, augmented and virtual reality, parallel programming, vision acceleration and machine learning. Khronos standards include Vulkan®, Vulkan® SC, OpenGL®, OpenGL® ES, OpenGL® SC, WebGL™, SPIR-V™, OpenCL™, SYCL™, OpenVX™, NNEF™, OpenXR™, 3D Commerce™, ANARI™, and glTF™. Khronos members are enabled to contribute to the development of Khronos specifications, are empowered to vote at various stages before public deployment and are able to accelerate the delivery of their cutting-edge accelerated platforms and applications through early access to specification drafts and conformance tests.
UCSC Silicon Valley Extension
Website: https://www.ucsc-extension.edu/
A legacy of more than 50 years of personalized professional education in the classroom—now bringing that to you virtually—for every stage of your career. Based in Silicon Valley, we offer hundreds of mentored courses taught by industry experts. Accredited, UC-quality curriculum in Technology, Business, Bioscience, Diversity Equity Inclusion, Education, Design.
AI Magazine
Website: https://aimagazine.com/
AI Magazine connects your brand with the world’s leading executives in the fields of AI strategy, machine learning and digitally disruptive technologies – thought leaders and innovators driving this pioneering sector.
Media 7
Website: https://media7.com/
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2021 Advisory Board
Author:
Andrew Feldman
Andrew is a co-founder and CEO of Cerebras Systems, a venture-backed stealth-mode startup located in Los Altos, California. He leads a team of phenomenal people with a track record of building products that profoundly changed the largest markets in tech.
Prior to co-founding Cerebras Systems, he was co-founder and CEO of SeaMicro. SeaMicro (acquired by AMD for $355 million) was the pioneer in low power server technology. SeaMicro changed the trajectory of the server industry by inventing the high density, lower power, microserver category.
Prior to co-founding SeaMicro, he was Vice President of Marketing and Product Management at Force10 (acquired by Dell for $800 Million) Networks, and Vice President of Corporate Marketing and Corporate Development for Riverstone Networks (NASDAQ: RSTN) from inception through IPO.
Andrew holds a B.A. and MBA from Stanford University.
Author:
Lip-Bu Tan
Mr. Lip-Bu Tan is a Co-Founder, Partner, Managing Director, and Chairman of Walden International. Mr. Tan serves as the Chairman on the Board of SambaNova Systems, Inc., and has been the Chief Executive Officer at Cadence Design Systems Inc. since January 2009, serving as its President from January 2009 to November 2017. Lip-Bu focuses on semiconductor/components, cloud/big data, artificial intelligence and machine learning. Lip-Bu holds a B.S. in Physics from Nanyang University in Singapore, a M.S. in Nuclear Engineering from Massachusetts Institute of Technology, and a M.B.A. from the University of San Francisco.
Author:
Karl Freund
Karl Freund is Moor Insights & Strategy’s consulting lead for HPC and Deep Learning. His recent experiences as the VP of Marketing at AMD and Calxeda, as well as his previous positions at Cray and IBM, positions him as a leading industry expert in these rapidly evolving industries. Karl works with investment and technology customers to help them understand the emerging Deep Learning opportunity in data centers, from competitive landscape to ecosystem to strategy.
Karl has worked directly with datacenter end users, OEMs, ODMs and the industry ecosystem, enabling him to help his clients define the appropriate business, product, and go-to-market strategies. He is also recognized expert on the subject of low-power servers and the emergence of ARM in the datacenter and has been a featured speaker at scores of investment and industry conferences on this topic.
Accomplishments during his career include:
- Led the revived HPC initiative at AMD, targeting APUs at deep learning and other HPC workloads
- Created an industry-wide thought leadership position for Calxeda in the ARM Server market
- Helped forge the early relationship between HP and Calxeda leading to the surprise announcement of HP Moonshot with Calxeda in 2011
- Built the IBM Power Server brand from 14% market share to over 50% share
- Integrated the Tivoli brand into the IBM company’s branding and marketing organization
- Co-Led the integration of HP and Apollo Marketing after the Boston-based desktop company’s acquisition
Karl’s background includes RISC and Mainframe servers, as well as HPC (Supercomputing). He has extensive experience as a global marketing executive at IBM where he was VP Marketing (2000-2010), Cray where he was VP Marketing (1995-1998), and HP where he was a Division Marketing Manager (1979-1995).
Author:
Kunle Olukotun
Kunle Olukotun is Cadence Design Professor of Electrical Engineering and Computer Science at Stanford University. He founded Afara Websystems, acquired by Sun in 2002. He is a Pioneer of Chip Multiprocessor Designs, Director of the Stanford Pervasive Parallelism Lab, and Co-leader of the Data Analytics for What’s Next (DAWN) research program.
In 2017 Olukotun and Chris Ré founded SambaNova Systems. SambaNova Systems has developed a disruptive next-generation computing platform to power machine learning and data analytics.
Author:
Victoria Rege
Victoria has over a decade of experience in the semiconductor space. She currently heads up Strategic Partnerships at Graphcore, working with key customers and leading Research & Universities AI engagements. Previously she held several leadership positions at NVIDIA from global alliances, product marketing and campaigns to the founding of the GPU Technology Conference. Prior to joining NVIDIA, Victoria worked in the hedge fund space, as Executive Director for the Hedge Fund Business Operations Association. Victoria is a frequent contributor to ACM SIGGRAPH and is Immersive Chair for the SIGGRAPH 2019 Conference. She's also an active member of the Consumer Technology Association's AI Working Group.
Author:
Cheng Wang
Originally from Shanghai, PRC. Cheng has led the architecture, silicon implementation and software development for eFPGA over multiple generations from 180nm-16nm and now AI inferencing development at Flex Logix. Two years as VLSI designer at Zoran. BSEECS, UC Berkeley. MSEE, EE PhD UCLA: designed 5 FPGA chips from 90nm to 40nm. 2013 Distinguished PhD Dissertation Award. 2014 ISSCC Lewis Winner Award for Outstanding Paper. Multiple patents at UCLA and Flex Logix.
Author:
Jimmy Pike
Jimmy D. Pike is a Senior Vice President and Senior Fellow at Dell EMC and serves as a senior system architect and technologist in the office of Dell’s Server and Infrastructure System’s CTO. In addition to his duties as an “at large” technologist, he focuses on high-performance computing, machine learning, and edge computing.
A longtime industry figure with more than 50 patents, Jimmy has served in various executive and technology roles:
• An analyst at the analyst firm of Moor Insights & Strategy
• Chief Architect of Dell’s Enterprise Solutions group and HPC lead technologist
• Chief Architect and Technologist for Dell’s Data Center group.
Jimmy has as also served in various other leadership roles at Intel, AT&T, NCR, and Harris Corporation.
Author:
Sailesh Kottapalli
Sailesh Kottapalli is an Intel Senior Fellow and the chief architect of data center processor architecture in the Silicon Engineering Group. He leads a team of architects responsible for developing the architecture of Intel® Xeon® and Intel® Atom™ server product lines as well as the overall compute solutions strategy for datacenter segment. He also leads a cross-organizations effort in driving the technology leadership on the Interconnect pillar. Kottapalli joined Intel in 1996 as a design engineer working on the first Intel® Itanium® processor, then code-named “Merced.” Subsequently, he served as lead engineer for several Intel Itanium and Intel Xeon processor evaluations, and more recently, as lead architect for a series of Intel Xeon server processors. His work in this area earned Kottapalli an Intel Achievement Award for delivering record generational performance improvements in a high-end server product. An active participant in industry and internal conferences, Kottapalli has authored or co-authored several published technical papers, delivered talks and taken part in roundtables and panel discussions. He has also been granted approximately three dozen patents in processor architecture, with additional patents pending. Kottapalli holds a bachelor’s degree in computer science from Andhra University in India and a master’s degree in computer engineering from Virginia Tech.
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Free Webinar Series
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25 August, 2021 at 3:15pm EDT
7 September, 2021 at 1:00pm EDT
12 October, 2021 at 1:00pm EDT
2021 Agenda
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Highlights
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The 2021 AI Hardware Summit will be returning the Computer History Museum. Aligned to social distancing rules and regulations, there will be a reduced capacity and we highly expect in person tickets to sell out way in advance of the summit. Book early to avoid disappointment.
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